I’ll be starting to publish a series that is written to aid new and interested readers with building, testing, and understanding type-2 hypervisor development. This hypervisor will be written for use on Intel processors with virtualization support. If you’re operating on an AMD chip, you may find some parts helpful, but overall it may not be what you need to understand the nuances. All concepts for each article, their importance, the references to more detailed information, and otherwise will be linked through just like any other of my blog posts followed by a recommended reading section at the end should your thirst for details and knowledge not be satisfied. I will also put recommended reading for those of you with interest in developing an AMD SVM.

There’s a lot here.

https://revers.engineering/day-0-virtual-environment-setup-scripts-and-windbg/

https://revers.engineering/day-1-introduction-to-virtualization/

https://revers.engineering/day-2-entering-vmx-operation/

https://revers.engineering/day-3-multiprocessor-initialization-error-handling-the-vmcs/

https://revers.engineering/day-4-vmcs-segmentation-ops/

https://revers.engineering/day-5-vmexits-interrupts-cpuid-emulation/

source: grugq